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PD - 94099B
SMPS MOSFET
Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting torque, 6-32 or M3 screw
IRFP32N50K
HEXFET(R) Power MOSFET
VDSS
500V
RDS(on)typ.
0.135
ID
32A
TO-247AC
Max.
32 20 130 460 3.7 30 13 -55 to + 150 300
Units
A W W/C V V/ns
C 10lb*in (1.1N*m)
Avalanche Characteristics
Symbol
EAS IAR EAR
Parameter
Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
450 32 46
Units
mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.26 --- 40
Units
C/W
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1
10/19/04
IRFP32N50K
Static @ TJ = 25C (unless otherwise specified)
Symbol V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.54 --- V/C Reference to 25C, ID = 1mA --- 0.135 0.16 VGS = 10V, ID = 32A 3.0 --- 5.0 V VDS = V GS, ID = 250A --- --- 50 A VDS = 500V, VGS = 0V --- --- 250 A VDS = 400V, VGS = 0V, TJ = 150C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 14 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 28 120 48 54 5280 550 45 5630 155 265 Max. Units Conditions --- S VDS = 50V, ID = 32A 190 ID = 32A 59 nC VDS = 400V 84 VGS = 10V --- VDD = 250V --- ID = 32A ns --- RG = 4.3 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Diode Characteristics
Symbol IS
ISM
VSD trr Qrr IRRM ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCurrent Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- 32 A 130
--- --- 1.5 V --- 530 800 ns --- 9.0 13.5 C --- 30 --- A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = 32A, V GS = 0V TJ = 25C, IF = 32A di/dt = 100A/s
D
S
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 0.87mH, RG = 25,
IAS = 32A,
ISD 32A, di/dt 296A/s, VDD V(BR)DSS,
TJ 150C
R is measured at TJ approximately 90C
2
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IRFP32N50K
1000
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
I D, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
10
10
5.0V
1
1
0.1
5.0V 20s PULSE WIDTH Tj = 25C
20s PULSE WIDTH Tj = 150C
0.1
0.01 0.1 1 10 100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS Drain-to-Source Voltage (V) ,
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance (Normalized)
1000
3.0
ID = 32A
I D , Drain-to-Source Current (A)
2.5
100
TJ = 150 C
2.0
10
1.5
TJ = 25 C
1
1.0
0.5
0.1
V DS = 50V 20s PULSE WIDTH 4 5 7 8 9 11 12
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFP32N50K
100000
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd
20
SHORTED
ID = 32A V DS= 400V V DS= 250V V DS= 100V
16
10000
C, Capacitance(pF)
Ciss
12
1000
Coss
100
8
4
Crss
10 1 10 100 1000
0
0
40
80
120
160
200
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 150 C
ID , Drain Current (A)
100
100 10us
10
100us 10 1ms
TJ = 25 C
1
0.1 0.2
V GS = 0 V
0.6 0.9 1.3 1.6
1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP32N50K
35 30
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
ID , Drain Current (A)
25 20 15 10 5 0
-VDD
Fig 10a. Switching Time Test Circuit
VDS 90%
25
50
75
100
125
150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response(Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFP32N50K
EAS , Single Pulse Avalanche Energy (mJ)
800
640
ID 14A 20A BOTTOM 32A TOP
15V
480
VDS
L
DRIVER
320
RG
20V
D.U.T
IAS
+ V - DD
A
160
tp
0.01
Fig 12c. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
Starting T J, Junction Temperature ( C)
Fig 12a. Maximum Avalanche Energy Vs. Drain Current
tp
V(BR)DSS
I AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit
Fig 13b. Basic Gate Charge Waveform
6
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IRFP32N50K
Peak Diode Recovery dv/dt Test Circuit
D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
+
+
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFP32N50K
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
TO-247AC Part Marking Information
EXAMPLE: T HIS IS AN IRFPE30 WIT H ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2000 IN T HE ASSEMBLY LINE "H"
Note: "P" in assembly line position indicates "Lead-Free"
PART NUMBER INT ERNATIONAL RECTIFIER LOGO ASS EMBLY LOT CODE
IRFPE30
56 035H 57
DATE CODE YEAR 0 = 2000 WEEK 35 LINE H
This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 10/04
8
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